Hi,
hier ist die Initialisierung des ENC 28J60 (zu finden in networkcard/enc28j60.c):
void enc_init(void)
{
int i=0;
unsigned int u;
unsigned char r, d;
// config enc chip select as output and deselect enc
ENC_DDR |= (1<<ENC_CS);
ENC_PORT |= (1<<ENC_CS);
// init spi
spi_init();
// send a reset command via spi to the enc
enc_reset();
// wait for the CLKRDY bit
while( !(enc_read_reg( ENC_REG_ESTAT ) & (1<<ENC_BIT_CLKRDY)) ) ;
// get enc revision id
enc_revid = enc_read_reg( ENC_REG_EREVID );
ENC_DEBUG("enc revid %x\n", (int) enc_revid);
// setup mymac variable
mymac[0] = MYMAC1;
mymac[1] = MYMAC2;
mymac[2] = MYMAC3;
mymac[3] = MYMAC4;
mymac[4] = MYMAC5;
mymac[5] = MYMAC6;
// setup enc registers according to the enc_configdata struct
while(1) {
r = pgm_read_byte( &enc_configdata[i++] );
d = pgm_read_byte( &enc_configdata[i++] );
if( r == 0xFF && d == 0xFF ) break;
enc_write_reg( r, d );
}
// now the phy registers
while(1) {
r = pgm_read_byte( &enc_configdata[i++] );
d = pgm_read_byte( &enc_configdata[i++] );
if( r == 0xFF && d == 0xFF ) break;
u = (((unsigned int)d) <<
;
d = pgm_read_byte( &enc_configdata[i++] );
u |= d;
enc_write_phyreg( r, u );
}
// setup receive next packet pointer
enc_next_packet_ptr = ENC_RX_BUFFER_START;
// configure the enc interrupt sources
enc_write_reg( ENC_REG_EIE, (1 << ENC_BIT_INTIE) | (1 << ENC_BIT_PKTIE)
| (0 << ENC_BIT_DMAIE) | (0 << ENC_BIT_LINKIE)
| (0 << ENC_BIT_TXIE) | (0 << ENC_BIT_WOLIE)
| (0 << ENC_BIT_TXERIE) | (0 << ENC_BIT_RXERIE));
// enable receive
enc_setbits_reg( ENC_REG_ECON1, (1<<ENC_BIT_RXEN) );
// the enc interrupt on the atmega is still disabled
// needs to get enabled with ETH_INT_ENABLE;
}
mfg
Klaus